1. Field of the Invention
This invention is related to the field of digital data multiplexing, and, more particularly, to the field of phase locked loop design.
2. Description of the Related Art
A digital source device may generate a stream of packets for transmission to a digital sink device. The packets may contain information that requires action by the sink device at certain times. Thus, the source device may embed timestamps into the packet stream so that the sink device can synchronize with the clock in the source device. However, the transmission time between the source device and the sink device may vary from one packet to the next of the packet stream, especially when the packet stream is multiplexed with other packet streams onto the same channel or data path. The variation in packet transmission time may make it difficult for the sink device to lock onto the source clock frequency associated with the packet stream. Thus, there exists a need for systems and devices capable of operating on the packet stream in a way that minimizes the variation of apparent source clock frequency as seen by the data sink.